Chip Industry Week in Review

SPIE News
News from this week’s SPIE Photomask Technology + Extreme Ultraviolet Lithography conference:
- ASML and TSMC are launching an industry initiative to transition high-NA EUV lithography from current 6-inch photomasks to larger 12-inch masks, which could improve scanner productivity and eliminate some stitching constraints. The companies are targeting a 12-inch mask pilot line by 2031, with production-ready systems by 2033. TSMC plans to begin using high-NA EUV in high-volume manufacturing in 2030.
- The eBeam Initiative‘s annual industry survey found 66% of semiconductor experts expect large-format photomasks to be adopted within a decade, while 94% expect mask revenue to grow this year.
- imec demonstrated single-exposure high-NA EUV patterning of 22nm-pitch lines/spaces and 28nm-pitch vias using established chemically amplified resist technology, supporting layers envisioned for A14/A10 logic.
- Intel Foundry and ASML said high-NA EUV has now processed more than 1 million wafers, including select production layers for Panther Lake, with Intel 18A high-NA layers meeting or exceeding comparable patterns made with conventional EUV.
- Samsung formally joined the 12-inch photomask initiative and says it plans to introduce high-NA EUV into DRAM high-volume manufacturing in 2028.
- D2S highlighted new PLDC techniques for improving mask uniformity and linearity, including Dynamic Maximum Dose, variable bias correctio, and offline processing.
- NY Creates joined the industry initiative developing 12-inch photomasks for high-NA EUV.
Arm broadens its AI push
At its Arm Everywhere conference in China, the company announced:
- A next-gen edge AI platform, Arm Compute Subsystems for Mobile 2, aimed at agentic AI and cinematic mobile graphics. It features Mali G2-Ultra NX neural accelerator GPU and CPU cluster technology with scalable matrix extension 2.
- A physical AI ecosystem program, Arm Total Design for Physical AI, for multiple companies across the technology stack, to boost development of robotics.
- Neoverse CSS N4 for AI infrastructure with up to 128 cores per die, supporting LPDDR6, PCIe 7, and delivering up to 2X the performance, complemented by the Arm AGI CPU.
- An AI portal to connect developers and optimize apps across its compute platform.
New Capacity
- Amkor announced phase 2 of its Arizona advanced packaging and test campus, adding 60,000 square meters of cleanroom space and increasing the planned investment to approximately $12B. Construction is expected to begin in late 2027.
- ASML has begun work on a new campus at Brainport Industries Campus North near Eindhoven, creating a second major site to support future manufacturing growth beyond its Veldhoven headquarters.
Memory
- SK hynix outlined a strategy spanning HBM, 3D DRAM, HBF, CXL and SSDs, with memory increasingly co-designed at the system level for AI. The company identified 3D memory as a key future technology.
- Kepler Computing emerged from stealth with its new high-bandwidth AI memory architecture using 3D stacking and ferroelectric materials. The company, which raised $468M, claims an order of magnitude capacity increase compared to SRAM and HBM, and expects to ramp production next year.
- Global DRAM industry revenue jumped ~60% sequentially to nearly $155B in Q2. Market share leaders: Samsung 39%, SK hynix 25% and Micron 23%.
- Chinese AI-chip suppliers including Huawei and Cambricon are raising accelerator prices as limited access to HBM drives up costs.
- Memory research: USC-led researchers developed a vertically stackable vdW memory selector with >10¹²-cycle endurance, sub-20 ns switching and low device variability, addressing a key challenge in scaling high-density 3D memory. NUS researchers developed an on-chip pulse generator for field-free magnetic switching, cutting write energy by four orders of magnitude and pointing to faster, lower-power magnetic memory.
Big deals
- Qualcomm and Amazon inked a deal worth up to $60B to create custom silicon for large-scale AI data centers and AI inference, along with optical connectivity up to 1.6T, and future solutions.
- Analog Devices agreed to acquire Alif Semiconductor in an all-cash transaction for $1.35B, for its high-efficiency AI-native MCUs and fusion processors optimized for on-device, physical AI.
- OpenAI is working with Samsung on next-gen chips, with OpenAI Korea chief Harrison Kim saying the companies have made significant progress in joint production and research, reports Reuters.
Raking it in
- Ayar Labs raised $150M and announced Wiwynn made a strategic investment earlier this year for its continued transition to high-volume manufacturing of CPO for AI scale-up.
- Positron AI raised $875M for its memory-first inference silicon built on commodity LPDDR5X.
- Fab2 raised $500M to mass-produce semiconductor fabs.
- Celero Communications raised $275M for its 1.6T to next-gen 3.2T AI optical interconnects, after validating 2nm coherent DSP silicon.
Quantum developments
- imec demonstrated three-metal-level NbTiN Josephson-junction circuits with densities of 3.8 million junctions/cm² and superconducting interconnects scaled to 30nm.
- Xanadu and ASML will collaborate on advanced lithography for photonic quantum chips to improve patterning and reduce optical loss.
- The U.S. Department of Commerce finalized $775M in previously announced CHIPS R&D awards for domestic quantum semiconductor development and manufacturing, including $375M for GlobalFoundries and $100M each for Rigetti, D-Wave, PsiQuantum, and Quantinuum.
Market data
- Revenue for the world’s top 10 foundries rose more than 11% sequentially to a record ~$53B in Q2, according to TrendForce.
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Global semiconductor sales reached $147B in July, up 135% YoY, according to the SIA.
- The data-center semiconductor market will reach $1.5T by 2031 as AI drives increasing demand for logic, memory, optical interconnects and power devices, predicts Yole Group. Advanced packaging and HBM capacity are emerging as major bottlenecks, while AI rack power could approach 1 MW by the end of the decade.
Financials
Quick links to more news:
In-Depth
Reports and Deals
New Technologies
Security
Vehicles, Batteries
Trending Video
Research
Quantum
Workforce | Education
Events and Webinars
Global
Europe
- The U.K. government released an expanded study of the country’s semiconductor sector, identifying 703 companies and estimating that dedicated semiconductor businesses generated £10.6B in revenue in 2025.
- SEMI Europe published a position paper outlining nine recommendations for the EU Chips Act 2.0, including broader First-of-a-Kind eligibility, six-month permitting timelines, and measures addressing energy, infrastructure, and manufacturing costs. It also called for balanced funding, so leading-edge projects don’t crowd out pilot lines, mature and specialty technologies, and advanced packaging.
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Keysight entered an agreement to support the EU’s Chips JU initiative by making its EDA software and training available to semiconductor startups and small and medium-sized enterprises.
- Belgian authorities arrested a former BelGaN researcher suspected of transferring GaN chip trade secrets to a Chinese company where he simultaneously served as a director.
- TU Eindhoven and European collaborators fabricated edge AI processors that combine RISC-V processors with specialized AI accelerators and memory-centric and neuromorphic computing.
Americas
- Silicon Labs opened a new R&D lab at its Austin headquarters aimed at advanced chip design and testing.
- Companies are exploring Argentina‘s remote, cold Patagonia region for data center buildout, per Reuters.
- Vention has opened a new physical AI and industrial robotics research lab in Montreal.
Asia
- China imposed provisional anti-dumping measures on Japanese dichlorosilane (DCS), a key material used in semiconductor thin-film deposition.
- McKinsey finds Taiwan and Southeast Asia are capturing a growing share of AI-related electronics trade, with Taiwan accounting for $47B of the $127B increase in AI-related U.S. imports in the first five months of 2026. Southeast Asia is also becoming more tightly integrated with Taiwan and South Korea in electronics supply chains.
- China plans to boost AI capacity through compute clusters of 100,000 accelerator cards, reports SCMP.
In-Depth
Semiconductor Engineering published the Test, Measurement and Analytics newsletter, including:
- Special Report: Validation Gets Tested At 1kW
- Redefining Processes At Sub-2nm
- Silent Data Errors Redefine Test Coverage And Fleet Maintenance Strategies
Plus:
Reports and Deals
More deals, launches
- Qolab and SkyWater signed a multi-year foundry agreement to manufacture superconducting quantum devices using SkyWater’s new SC250 platform.
- Samsung Electronics and Mistral AI formed a strategic partnership to deploy customized, on-premises AI models across Samsung’s semiconductor operations for defect detection, equipment optimization, and yield improvement. Samsung also led Mistral AI’s Series D funding round and took a strategic equity stake.
Fundings, IPO
- Altera is reportedly preparing an IPO that could raise more than $2B. Silver Lake owns 51% of Altera, while Intel retains 49%.
- NLM Photonics expanded funding to commercialize organic photonics, including an investment from Mitsubishi Chemical.
- SCI Semiconductor raised $6.4M for memory-safe chips, per DealRoom.
- nanoSkunkWorkX raised $2M for package copper for AI and HPC.
More reports and opinions
- Polysilicon and the Merits of Trade Measures as Industrial Policy (CSIS)
- Economics of Data: Scaling Infrastructure for the AI-Driven Data Economy (IDC)
- Philippines wants to be a global semiconductor giant by 2030 (SCMP)
- SW-defined manufacturing will change industrial semiconductor demand (Omdia)
- States That Gave Data Centers Billions in Tax Breaks Are Now Ripping Up the Deals (WSJ)
New Technologies
PDF Solutions debuted Exensio Aurora, its new scalable analytics architecture. The product is designed to handle semiconductor manufacturing data at petabyte scale and securely deploy agentic AI across manufacturing operations and the supply chain.
Taiyo Holdings and imec demonstrated a 3-layer RDL with 700nm wiring and vias on 300mm wafers using Taiyo’s new photosensitive dielectric material. The work advances fine-pitch RDL technology for advanced packaging.
Infineon introduced the TDA235E5 and TDA235E0, a dual-phase smart power stage family designed to meet growing power density requirements of next-generation AI accelerators and vertical power delivery modules. The new offerings will deliver benchmark power density exceeding 2 A/mm².
imec has moved its 96-band hyperspectral linescan sensor into commercial availability for camera and satellite developers. The CMOS-based sensor has a spectral range of 450 to 900nm, improves signal-to-noise ratio by 40% over its predecessor, and integrates its spectral filters directly on-chip.
CoreWeave launched “Physical AI Field Engineering” this week, a new offering built to help manufacturers integrate physical AI into their engineering processes.
Smartphone chips
- Apple unveiled new products under new CEO, John Ternus, including its 2nm A20 Pro chip for the iPhone 18 with 50% more memory bandwidth and integrated neural accelerators, as well as the company’s first foldable phone, iPhone Duo.
- Powering its new Mate XT 2 trifold smartphone, Huawei launched the first commercial application of its Kirin 9050 Pro chip with LogicFolding architecture, with 42% better performance than its predecessor, per SCMP. (Read a related technical paper: Huawei’s Tao Chip Was Supposed to Melt?)
Connecting data centers
- OIF published the implementation agreement for 1600ZR Coherent Interfaces, doubling the capacity of its 800ZR specification.
- Meta and Panmnesia proposed an architecture that lets an entire data center operate as one chip by placing CPUs, accelerators, and memory in a single CXL-over-optics-based domain, with a high-fan-out non-blocking switch, a link acceleration unit and a fabric controller to bound latency variability.
Adoptions and certifications
- Cadence qualified its EDA tool flow to run natively on AWS Graviton, including front-end design and verification, synthesis, place-and-route, and timing sign-off. Annapurna Labs is now designing future-gen Graviton CPUs using the Cadence flow.
- Japan’s NanoBridge Semiconductor adopted Siemens EDA’s FPGA tools for its low-power, harsh-environment FPGAs for aerospace, automotive, and critical infrastructure.
- d-Matrix will use NVIDIA’s NVLink Fusion to connect its upcoming Raptor inference processors directly into NVIDIA-based data center systems. Raptor is expected to complete final design this year, with compatible rack-scale systems targeted for 2027.
- Redington will distribute Siemens EDA’s Xcelerator portfolio of industrial software across Africa.
Research
Kyocera and Tohoku University developed an isolator-integrated photonics chip that reduces back-reflected light by about 95%, enabling faster, energy-efficient AI data centers.
CEA-Leti, Spintec, and Université Paris-Saclay researchers demonstrated a hybrid nanoelectronic Ising machine — combining hafnium-oxide ReRAM devices with stochastic MTJs — with an intrinsic annealing mechanism that could pave the way for more compact, faster, and energy-efficient hardware accelerators.
Harvard researchers co-designed a layered semiconductor and a metasurface, so every part of the device, including electronic states, optical fields, and geometry, works together toward efficient frequency conversion at a given wavelength, which could help miniaturize photonics and quantum technologies.
Researchers in Japan have demonstrated the first epitaxial growth of single-crystalline polar wurtzite NbAlN on GaN. An optimized NbAlN/GaN heterostructure more than tripled sheet electron density while retaining high room-temperature mobility, suggesting a potential new route to higher-performance GaN power and RF devices.
Security
AI Threats
- Google published new warnings on agentic AI-enabled cyberthreats this week, sounding alarms for expanded SW supply chain risks, threats to AI IP, and increased LLMjacking efforts.
- Independent researchers found that a swarm of OpenAI agents reportedly hacked a German wiki site to create a message board earlier this year, in an incident that appears to have preceded the similar Hugging Face breach in July.
- Anthropic published an updated cybersecurity advisory after discovering a fourth instance of a Claude model gaining unauthorized access to a third-party system.
- AWS released Deception Benchmark, a new framework designed to test whether AI models can “distinguish real vulnerabilities from code that looks risky but is actually safe.”
- A new IAPS report on AI data center security called for new industry security standards, increased cross-company incident intelligence sharing, and security-focused supply chain realignment in the face of emerging AI threats to data centers.
Alerts and advisories
- Microsoft patched a record number of security vulnerabilities this week, fixing 974 total flaws.
- The FBI published its first-ever cyber strategy roadmap, with the document outlining a shift toward more proactive cybercrime disruption efforts.
- Cisco updated its Secure Firewall Management Center advisory to confirm active exploitation of a critical authentication-bypass vulnerability that can let unauthenticated remote attackers gain root access.
- CERT Polska warned that attackers are actively exploiting a chain of six MikroTik RouterOS vulnerabilities. Two flaws can be combined to take full control of exposed routers through SSH without authentication.
- The NSA, FBI, and CISA issued a joint advisory covering cybersecurity threats tied to Chinese AI companies conducting industrial-scale distillation campaigns against US frontier AI models. Chinese companies have “likely extracted billions of tokens across millions of exchanges/requests from U.S. frontier AI models” since 2024, the agencies said.
- CISA also updated its Insider Threat Mitigation Guide for physical and cyber threats. All of CISA’s alerts for the week are here.
Security technical papers
- HW Trojan Threats to Multi-Chiplet Photonic NN Accelerators (Colorado St.)
- HW Info-Flow Tracking for Pre-Silicon Security Testing (Princeton, MIT et al.)
- Side-Channel Leakage Using EM Injection & HW Nonlinearity (HKUST et al.)
Vehicles, Batteries
Auto chips and tech
- Infineon introduced a new PMIC designed for high-voltage traction inverter applications in electric and hybrid vehicles.
- Himax unveiled a new single-chip touch and display driver integration solution built with high-speed eDP interface support.
- LG Energy and Seoul National University researchers developed a method to suppress gas generation in lithium-manganese-rich batteries.
Vehicle and battery deals
- SK keyfoundry and automotive mixed-signal semiconductor supplier Elmos announced a new long-term wafer supply deal alongside plans to expand the companies’130nm technology collaboration.
- Microchip announced a strategic collaboration with Longhorn Automotive to integrate its VS700 ASA-ML chipsets into camera systems for ADAS and in-cabin sensing.
- Siemens is collaborating with Binghamton University’s Battery-NY initiative to help scale up battery manufacturing in upstate New York.
U.S. Government involvement
- The U.S. DOT began eVTOL testing in Fort Worth, Texas.
- A U.S. congressman is demanding that federal agencies investigate reported misuse of Tesla’s FSD feature after an NBC News investigation documented dozens of drivers apparently sleeping behind the wheel while using the feature.
- NHTSA opened an investigation into Tesla’s self-certification that its steering wheel- and pedal-free Cybercab complies with federal vehicle safety standards.
Vehicle and battery technical papers
- Lightweight Zero Trust via Automotive SDN (Robert Bosch)
- Continual learning for multifaceted improvement of SDVs (NTU et al.)
- Framework for Autonomous Testing of Infotainment Systems (UPorto)
- Low-Strain and High-Power Anodes for Lithium-Ion Batteries (UTokyo)
Trending Video
The Intersection Of AI And Voice At The Edge: How natural language processing will fundamentally change the way humans interface with machines.
Cadence’s Amol Borkar examines how this technology will improve even further in the future, why the focus isn’t just about faster processors, and why this is so important for edge systems.
Quantum
SkyWater launched SkyWater Quantum Solutions, combining superconducting, quantum photonics, heterogeneous integration, and advanced packaging capabilities to help move quantum technologies into manufacturing.
Fujitsu developed a working prototype of a diamond-spin quantum computer that incorporates tin-vacancy (SnV) centers into photonic ICs, an important step toward a modular architecture.
IonQ released Superion 256, an upgradeable platform designed to scale manufacturable fault tolerant quantum computing. It also published a fully compiled blueprint for breaking 256-bit elliptic-curve signatures, and partnered with Congruity360 to boost quantum-safe protection.
LUMI AI Factory selected IQM’s staged path to deploy the EU’s first superconducting quantum computer with logical qubits, at IT Center for Science in Finland, as part of a hybrid HPC, AI, and quantum computing platform.
Quantum research
- A University of Chicago researcher found that a quantum computer could “use high-powered lasers as ‘optical tweezers’ to capture and control individual atoms of helium,” offering faster tunneling, faster transport, and controllable motional qubits, compared to designs based on lithium.
- An MIT researcher tested GPT-5.6 Sol’s ability to run measurements on an uncalibrated six-qubit chip and found that, when the signals were clear, Codex completed a standard sequence of measurements with little researcher intervention.
Workforce, Education
The National Network for Microelectronics Education formed its first Industry Advisory Committee, bringing together leaders from Lam Research, Intel and others to guide U.S. semiconductor workforce strategy. The group will help align education and training programs with industry needs as the sector faces a projected shortfall of 127,000 to 157,000 workers by 2030.
India is providing EDA tools to 13 engineering colleges under its chips to startup (C2S) program.
The U.S. State Department formally launched Foundry School, a training program for engineers, technicians and industry leaders, with instruction spanning semiconductors, factory design, automation, supply chains and manufacturing operations.
Events and Webinars
Upcoming webinars are here, including:
- Simulation for Data Center Cooling Infrastructure — Sept. 15
- Verifying IP and SoCs at Real Workload Speeds — Sept. 15
- How SysML v2 and Generative AI Transform Engineering — Sept. 16
- Understanding Design Changes Across Schematics and Layouts — Sept. 16
- Scaling AI Interconnects with Co-Packaged Optics — Sept. 17
| EVENTS | Date | Location |
|---|---|---|
| AI Infra Summit 2026 | Sept. 15 – 17 | Santa Clara, CA |
| EDA Cloud Tech Day 2026 | Sept. 16 | Santa Clara, CA |
| SEMICON India | Sept. 17 – 19 | New Delhi, India |
| TUGx Global Seminars U.S.: Teradyne User Groups | Sept. 17 – 30 | Salem, NH 9/17; San Jose 9/22; Irvine 9/24; Austin 9/29; Plano 9/30 |
| JEDEC Automotive Electronics Forum | Sept. 17 | Santa Clara, CA |
| GSA: 2026 U.S. Executive Forum | Sept. 22 | Menlo Park, CA |
| TSMC 2026 North America OIP Ecosystem Forum | Sept. 23 | Santa Clara, CA |
| Keysight Design Forum 2026 | Sept. 24 | Santa Clara, CA |
| IMAPS Symposium 2026 | Sept. 28 – Oct. 1 | Everett, MA |
| Microelectronics UK | Sept. 29 – 30 | London, UK |
| IEEE International 3D Systems Integration Conference (3DIC) | Oct. 1 – 2 | Atlanta, GA |
| International Test Conference | Oct. 11 – 16 | San Antonio, TX |
| 2026 OCP Global Summit | Oct. 12 – 15 | San Jose, CA |
| SEMICON West 2026 | Oct. 13 – 15 | San Francisco, CA |
| CadenceCONNECT Photonics 2026 | Oct. 14 – 15 | San Jose, CA |
| PDF Solutions CONNECT 2026 | Oct. 15 – 16 | San Francisco, CA |
| 2026 EPEPS Conference: Electrical Performance of Electronics Packaging and Systems | Oct. 18 – 21 | Fort Worth, TX |
| Synaptics Tech Day 2026 | Oct. 20 | San Jose, CA |
| Jasper User Group 2026: Cadence Connect | Oct. 21 – 22 | San Jose, CA |
| OktoberTech Silicon Valley 2026 | Oct. 22 | Mountain View, CA |
| CASPA 35th Annual Conference & Dinner Banquet | Oct. 23 – 24 | Santa Clara, CA |
| IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE) | Oct. 27 – 29 | Phoenix, AZ |
| MICRO 2026: 59th IEEE/ACM International Symposium on Microarchitecture | Oct. 31 – Nov. 4 | Athens, Greece |
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