Silanna Targets Edge AI with High-Performance Compact ADCs

Silanna has launched the Plural Nano family of high-performance analog-to-digital converters (ADCs) for Edge AI and other applications with limited PCB space. The devices offer resolutions from 12 to 16 bits and sampling rates from 5 to 250 Msps, in compact 64-ball BGA packages that reduce board footprint by up to 86% compared with competing products.

The family includes two package options. The 3.4 × 3.4 mm version supports single- and dual-channel 12-bit configurations, as well as single-channel 14- and 16-bit devices. The larger 3.7 × 3.7 mm package accommodates dual-channel 14- and 16-bit variants.

According to Silanna, competing ADCs operating above 125 Msps are almost universally housed in packages measuring at least 9 × 9 mm. Compared with these devices, the two Plural Nano package variants reduce footprint by 83% and 86%, respectively. Against competing 125 Msps converters, typically measuring at least 5 × 5 mm, the footprint reductions reach 45% and 54%.

Plural Nano shares the proprietary factory-configurable architecture of Silanna’s original Plural ADC family. Rather than defining each device’s specifications during silicon design, this approach lets teams establish specific product configurations, or SKUs, after fabrication. Conventional ADC production requires separate mask sets and manufacturing runs for different specifications, increasing costs and risks while making lead times dependent on fabrication capacity.

By enabling higher-volume production from a common architecture, Silanna’s approach is intended to reduce manufacturing risk, shorten lead times, and lower costs. It also avoids the need to maintain niche, potentially unprofitable SKUs late in a product’s lifecycle.

At launch, 90 ADC configurations covering 12-, 14-, and 16-bit resolutions will be available, with the same feature sets and performance as their full-sized Plural equivalents. Silanna plans to announce additional resolutions and features later in 2026.

Like the original Plural family, the Nano devices combine a pipeline ADC core with integrated reference and clock-management circuitry. They support both LVDS and CMOS outputs and operate from -40°C to +85°C.

Plural Nano ADCs and evaluation kits are available through Silanna’s authorized distributor network. You can request specifications, samples, and more product information through the company’s Plural Nano product page.

The post Silanna Targets Edge AI with High-Performance Compact ADCs appeared first on Power Electronics News.