Vertical Semiconductor Targets $73M in CHIPS Funding for GaN

Vertical Semiconductor has signed a letter of intent with the U.S. Department of Commerce’s CHIPS Research and Development Office (CRDO) to receive up to $73 million in federal incentives under the CHIPS and Science Act. The proposed funding would support research and development of next-generation vertical gallium nitride (GaN) power transistors to advance domestic production and strengthen U.S. capabilities in power infrastructure for artificial intelligence (AI) data centers and high-performance computing.

Spun out of the Massachusetts Institute of Technology (MIT), Vertical Semiconductor is developing vertical GaN FinFET technology for power conversion systems requiring high efficiency and power density. The technology originated from research supported by the U.S. Department of Energy’s Advanced Research Projects Agency–Energy (ARPA-E). The company is now working to scale the technology toward commercial deployment.

AI workloads are increasing demand for data center compute capacity and the electrical infrastructure needed to support it. Improving power conversion efficiency can reduce energy losses across the facility and let more available electricity reach computing hardware.

Vertical Semiconductor’s proposed R&D and commercialization initiative would develop vertical GaN transistors for deployment throughout the AI data center power chain, from the grid connection to the compute equipment. The company expects the technology to improve power delivery efficiency and density, potentially enabling more computing capacity without requiring a corresponding increase in grid power availability.

A key project objective is to develop a 2.5 MW AI rack described as a first-of-its-kind system. According to Vertical Semiconductor, the design aims to reduce energy losses by 30% and physical footprint by 50%. By limiting power lost during conversion and distribution, the system aims to make more of the electricity already available to a data center usable for computation.

These figures are project targets, not demonstrated results. The proposed initiative would use the rack as a platform for validating the technology’s potential benefits across multiple stages of power delivery. The planned work is intended to advance both the underlying transistor technology and its commercialization in the United States. The letter of intent establishes a proposed path toward up to $73 million in federal support; it does not, by itself, confirm that the full amount has been awarded or disbursed.

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