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Cadence Introduces Maestro AI Models to Accelerate Chip Design with Up to 5X Greater Token Efficiency

ELE Times

Cadence has introduced its Maestro AI Model Portfolio to support its AI Super Agents in semiconductor and system design. The portfolio combines specialised AI models with reinforcement learning and Cadence’s existing electronic design automation (EDA) and system design automation (SDA) tools. This integrated platform aims to improve design quality, speed up engineering workflows, reduce development time and continuously improve performance based on feedback from previous tasks.

Cadence Maestro provides a secure AI platform that helps engineers handle complex chip and system design tasks. It combines specialised AI models of different sizes with trained decision-making systems and AI skills that improve through repeated use and feedback. The platform works with Cadence’s AI Super Agents, including AuraStack, ChipStack, InnoStack and ViraStack, along with its existing electronic design automation (EDA) and system design automation (SDA) tools. It can also combine Cadence’s specialised models with other advanced and open-weight AI models. Customers can deploy these capabilities through cloud services or on-premises systems, giving them greater flexibility and control over their engineering data and design workflows.

“Revolutionizing complex engineering tasks requires deep domain-specialized intelligence,” said Anirudh Devgan, president and CEO at Cadence. “Combining our Maestro portfolio of domain-specialized models with leading frontier and open-weight models enables our AI Super Agents to drive Cadence EDA and SDA tools with exceptional skill and efficiency to transform chip and system design.”

“Agentic chip design requires AI that can generate design content, evaluate tradeoffs and learn from verified engineering results,” said Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA. “Our collaboration with Cadence brings NVIDIA Nemotron, OpenShell and deep engineering expertise to Maestro’s domain-specialized models. By grounding reinforcement learning in feedback from EDA tools and deterministic solvers, we can teach agents to make better design decisions based on how well their work meets engineering objectives and constraints.”

“We are deploying Cadence’s InnoStack AI Super Agent into our production design environment,” said Hisato Yoshida, COO of Socionext. “By combining agentic AI with advanced EDA tools for physical design, we expect up to 5X overall productivity gains while maintaining design quality. We see the Maestro portfolio as the next step in driving even greater efficiency across our design process.”

“Ultra-low power devices require innovation across disciplines. Agentic AI unlocks new power opportunities,” said Garima Sharda, vice president of engineering at Silicon Labs. “By leveraging the Cadence Verisium Debug as part of ChipStack AI Super Agent, our engineering teams have achieved acceleration in root-cause analysis and end-to-end debug during pre-silicon low power verification. We look forward to realizing further benefits through Cadence’s Maestro domain-specialized models.”

A Self-Improving Learning Environment for Engineering AI

Initial results show up to 30% improvement in quality of results and up to 5X greater token efficiency versus general purpose foundation models. These gains come from a vertically integrated learning environment combining Cadence domain knowledge, curated engineering datasets, AI Super Agents, EDA and SDA tools, and evaluation harnesses. Cadence’s principled algorithms and deterministic solvers evaluate outputs against engineering objectives, constraints and ground truth, creating closed and verified feedback loops for reinforcement learning and recursive improvement.

Domain Intelligence with Intelligent Model Choice

The Cadence learning environment unifies complementary AI capabilities in a single workflow. Frontier and open-weight models provide broad language, reasoning and multimodal capabilities; the Maestro AI Model Portfolio provides domain expertise for complex chip and system design. Given a high-level objective, Cadence AI Super Agents interpret design intent, decompose tasks, orchestrate the Maestro portfolio with other leading frontier and open-weight models, and drive Cadence EDA and SDA tools. The combined solution interprets specifications, generates design content, analyzes results, evaluates tradeoffs and guides decisions based on engineering requirements, cost and security. The Maestro portfolio, including NVIDIA Nemotron and other models, can be further post-trained on a customer’s proprietary data, designs, and workflows and, by balancing EDA and SDA tool calls with LLM invocations, it significantly reduces token usage while maintaining execution efficiency.

The complete Cadence agentic environment—including AI Super Agents, Maestro AI Model Portfolio and EDA tools—can run on Cadence’s secure cloud platform, secure public clouds, or in a customer-controlled on-premises environment to meet data privacy, security and deployment requirements. Cadence and NVIDIA are also working together on agent security through integration with the NVIDIA OpenShell Reference Architecture.

The post Cadence Introduces Maestro AI Models to Accelerate Chip Design with Up to 5X Greater Token Efficiency appeared first on ELE Times.

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