Chip Industry Technical Paper Roundup: Oct. 27

New technical papers recently added to Semiconductor Engineering’s library:

Technical Paper	Research Organizations
Beyond HBM-on-GPU: Thermal Design Envelope for 3D Volumetric DRAM-on-GPU Integration	imec
Self-Heating and Parasitic Effects in Multi-Tier CFET Design	TU Munich, IIT Kanpur
Reduced-DSP 200G/λ Low-Voltage Slow-Light Silicon Modulator Enabled by Built-In EO Equalizer	Institute of Science Tokyo, Yokohama National University, AIST, PETRA
Irradiation-Source-Dependent Tone Conversion in Dry-Deposited Halogenated Amorphous Zeolitic Imidazolate Framework Resists for Electron-Beam and EUV Lithography	KU Leuven, Kunsan National University, Vrije Universiteit Brussel, imec
NN-Based Transistor Modeling for Ultra-Fast SPICE Simulation and Standard Cell Library Characterization	TU Munich
SEAL: Multitenant Security-Aware Layer Mapping for Heterogeneous 3-D CiM Accelerators	Arizona State University, University of Maryland
Evaluating an alternative Pt-W alloy as a low-n EUV mask absorber: Film properties and imaging performance	Chinese Academy of Sciences et al.

Find more semiconductor research papers here.