Cadence Launches Maestro AI Models for Chip and System Design

Cadence Design Systems Inc. has introduced the Maestro AI Model Portfolio, a collection of domain-specialized artificial intelligence models designed to power agentic workflows across semiconductor and system design. The portfolio integrates specialized models with Cadence AI Super Agents, electronic design automation (EDA) and system design automation (SDA) tools, and reinforcement learning (RL) to improve engineering outcomes and accelerate development.

The Maestro AI Model portfolio combines post-trained large language models (LLMs), trained decision models, and self-improving agent skills. It is designed to work with Cadence AI Super Agents, including AuraStack, ChipStack, InnoStack, and ViraStack, combining domain-specific engineering knowledge with frontier and open-weight AI models.

Cadence reports that initial design-workflow results show up to 30% higher quality and up to five times greater token efficiency compared with a general-purpose foundation model. These results stem from a vertically integrated learning environment that combines engineering datasets, Cadence domain knowledge, AI Super Agents, EDA and SDA tools, and evaluation systems.

Within this environment, deterministic solvers and evaluation algorithms assess outputs against engineering objectives, design constraints, and reference results. The resulting feedback loops support reinforcement learning and iterative model improvement, aiming to make AI-generated engineering outcomes more reliable and efficient.

The Maestro portfolio complements the broad reasoning and multimodal capabilities of general-purpose models with specialized intelligence for complex engineering tasks. Given a high-level design objective, Cadence AI Super Agents can interpret specifications, break work into subtasks, coordinate different models, and execute operations through Cadence design tools.

The integrated workflow supports design-content generation, result analysis, trade-off evaluation, and decision-making based on engineering requirements, cost, and security. Models, including Nvidia Nemotron, can also be further post-trained using customer-specific data, designs, and workflows. By balancing language-model requests with EDA and SDA tool execution, the platform aims to reduce token consumption while maintaining workflow efficiency.

The complete environment can run on Cadence's secure cloud platform, supported public-cloud environments, or customer-controlled on-premises infrastructure. This flexibility accommodates different data privacy, security, and deployment requirements. Cadence and Nvidia are also collaborating on agent security through integration with the Nvidia OpenShell Reference Architecture.

The first Maestro models will be available to select early-access customers in the fourth quarter of 2026.

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