Navitas, Microchip Develop 800V AI Data Center Reference Design

Navitas Semiconductor and Microchip Technology have developed an 800V DC-to-6V DC reference design for AI data center rack power systems. The platform combines Navitas GaNFast gallium nitride power devices with Microchip digital power control and hardware security technologies to support high-efficiency power conversion based on the Open Compute Project (OCP) 800 V DC architecture.

The reference design uses Microchip’s dsPIC33AK digital signal controller together with Navitas NV6034 650 V GaNFast FETs. The dsPIC33AK256MPS306 family incorporates a 200 MHz 32-bit processor, double-precision floating-point unit, 78 ps high-resolution PWM capability, and multiple 12-bit ADCs operating at up to 40 MSPS. These peripherals support fast, deterministic control loops for high-frequency DC/DC power conversion.

The primary power stage uses 16 NV6034 devices, each rated at 650 V with 17 mΩ on-resistance, in a stacked half-bridge configuration. The GaN FETs use a DFN 8 × 8 mm dual-side-cooled package to lower thermal resistance and support higher continuous-power operation. The reference platform targets peak efficiency of up to 96% at full load while switching at 1 MHz, with a stated power density of 2,100 W/in³.

The architecture directly converts 800 V DC to 6 V DC, combining the conventional 800 V-to-50 V and 50 V-to-6 V conversion stages into a single converter. The resulting low-profile implementation is approximately 20% thinner than a mobile phone and is intended for close integration with GPU boards, helping reduce power-distribution losses and improve transient response.

Security is integrated through Microchip’s TA100 CryptoAuthentication device, providing hardware-based functions including secure boot, message authentication, trusted firmware updates, and key management. The dsPIC33AK platform also supports cryptographic functions and libraries associated with CNSA Suite 2.0 post-quantum cryptography algorithms.

The reference platform will include evaluation hardware, software, and design documentation. It is intended to give developers a starting point for compact, high-voltage rack power systems while addressing efficiency, power density, transient performance, and security requirements in next-generation AI data centers. The solution will be showcased at Microchip’s OCP Event in San Jose, California, from October 12 to 15, 2026.

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