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Astera Labs Unveils PCIe 7 Connectivity Chips for Next-Generation AI Systems

Semiconductor Digest

Astera Labs, Inc. today announced the industry’s broadest PCIe 7 signal conditioning portfolio spanning smart retimers, redrivers, cable modules, optical drivers, and optical TIAs. The expanded Aries 7 portfolio offers hyperscalers, neoclouds, OEMs and ODMs a comprehensive connectivity platform that now extends reach from centimeters of PCB trace to 50+ meters over optical cables spanning multiple racks.

Multi-rack AI clusters are demanding more bandwidth between every accelerator, memory pool, and networking port. Yet doubling PCIe data rates shrinks signal margins, where a single unstable link can idle costly accelerators that reduce token-per-watt performance. And getting these platforms to production has meant stitching together fragmented multi-vendor solutions with different firmware and software, then re-spinning board designs and validation—resulting in delays in deploying AI infrastructure.

Aries has long been the gold standard for reliable PCIe links resulting in high accelerators’ utilization. The Aries PCIe 7 expansion carries that same philosophy across every channel a modern cluster needs: use copper where it is the most efficient choice and move to optical where reach demands it—all optimized and monitored through Astera Labs’ unified COSMOS software suite. Aries 7 Smart Retimers and Smart Redrivers support the OCP Signal Conditioner Standard Footprint, allowing customers to design once and decide later: as design requirements change, customers can pick different signal conditioners without redesigning the board—optimizing for power and accelerating time-to-market. Aries 7 Smart Optical Drivers and Optical TIAs enable that same intelligence in low power, high density NPO and LPO, designed to deliver optimum performance across multi-rack AI fabrics.

Platform partners have put Aries link reliability to the test across multiple generations: AMD and Intel have each validated Aries Smart Retimers in production across their platforms from PCIe 4 through 6. Both companies are now collaborating with Astera Labs to lead the industry’s transition to PCIe 7.

“The real question for architects isn’t retimer vs redriver, or copper vs optical: it’s whether they have one comprehensive toolbox with the optionality to pick the right tool for their evolving reach, density and power requirements” said Adit Narasimha, senior vice president, Signal Connectivity Group at Astera Labs. “That is what we built with Aries: the same intelligence and the same software, for the solution the link needs.”

Aries 7 Smart Retimers, Smart Redrivers, Smart Cable Modules, and Smart Optical Driver and TIAs are expected to begin sampling in Q4 2026 to select hyperscale, OEM, and NPO customers, with broader availability anticipated as platforms complete qualification. Astera Labs will showcase PCIe 7 copper and optical demonstrations next week at the 2026 Open Compute Project (OCP) Global Summit, Oct. 12-15 in San Jose.

The post Astera Labs Unveils PCIe 7 Connectivity Chips for Next-Generation AI Systems appeared first on Semiconductor Digest.

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